Performance

The following paragraphs give an overview on OpenVAF's performance. Both compilation speed and simulation speed are analyzed. Compilation speed of different Verilog-A compilers is straightforward to compare. However, comparing the simulation speed of different simulators is difficult. Each simulator implements different convergence algorithms, and might perform better under different circumstances. The netlists and options have been made as equal as possible, yet it must be stressed that the simulation performance of different simulators cannot be compared.

In simulations with commercial simulations, the license checkout time has been removed from the run-time. As far as possible, writing to the hard-disk has been turned off for reducing the impact of read/write calls that are not of interest here. For Keysight ADS turning off all IO was not possible.

The chosen benchmarks are mostly simple single-transistor benchmarks, so that the model evaluation code (generated by OpenVAF) is the main bottleneck instead of other algorithms in the simulator. Note that multithreaded model evaluation with OpenMP support was turned off in Ngspice for these benchmarks. These benchmarks were run on an Intel i7-9750H@2.60GHz with 16 GB of DDR4 RAM and a SSD, if not mentioned otherwise. The benchmarks were performed with OpenVAF 22.12.0, XYCE 7.5 and Keysight ADS 512.update2.0. and Cadence Spectre 18.1.077.

We acknowledge our academic partner for help with these comparisons.

Model Compilation

The model compilation time in seconds is compared between different models and different tools.

Benchmark results (in seconds, less is better):

The benchmarks above exemplify that OpenVAF tends to outperform alternative compilers by a factor of 10 w.r.t. to compilation speed. For models like BSIM4 that have a very large number of model parameters, but (comparatively) small evaluation code, performance is currently slightly worse than it will be with coming OpenVAF releases. This problem is a known limitation and will be addressed in the future. Nonetheless, OpenVAF outperforms other compilers by a factor of 4 in the worst case.

=> OpenVAF compiles around x10 faster than existing tools!

- = Spectre compilation fails:

• BSIM4: gcc compiler error without error message

* = Xyce buildxyceplugin fails:

• HICUM/L2: brackets at macro def
• BSIM-SOI: Custom model v4.5 from Xyce repo
• BSIM-Bulk: Non-independent initializations and node collapses, could not easily fix
• EKV: par. range macros, noise sources not working

Model Evaluation

HICUM/L2v2p4p0 Output Characteristics

The aim of this benchmark is to provide a rough overview of Verilog-A model performance across different simulators. As noted in the introduction, comparisons between different simulators are not easy to interpret. In particular, different simulation configuration and convergence algorithms may affect the results.

Benchmark Setup: Simulation of HBT output characteristics using HICUM/L2 model shown in the examples. The collector and base voltage step width is set to 1 mV, increasing the simulation time significantly.

Benchmark results (in seconds, less is better):

• Ngspice (OpenVAF): 9.16s
• Ngspice (built-in): 14.64s
• Xyce (ADMS): 36.42s
• Xyce (built-in): 26.56s
• ADS (Verilog-A): 8.63s
• ADS (built-in): 7.01s
• Spectre (Verilog-A): 52.61s
• Spectre (built-in): 25.33s

Notes:

• The OpenVAF compiled model runs faster than the built-in Ngspice HICUM/L2 model as this particular built-in implementation uses slow dual-number based derivatives
• Xyce evaluation time is very likely larger due to difference in convergence algorithms, and not inherently due to Xyce itself.

BSIMSOI 4.4.0 Output Characteristics (builtin vs OpenVAF)

BSIMSOI is available as a very mature and highly optimized hardcoded model in Ngspice. The derivatives are all handwritten and haven been manually optimized over many years. Therefore, comparing OpenVAF to this handwritten version allows evaluating the quality of the OpenVAF generated derivatives.

Benchmark Setup: Simulation of MOSFET output characteristics with very fine bias steps.

Benchmark results (in seconds, less is better):

• Ngspice (OpenVAF): 8.47s
• Ngspice (built-in): 7.98s

=> OpenVAF models are only 6% slower than carefully optimized handwritten code.

BSIMBULK 106.2 Output Characteristics (ADMS vs OpenVAF)

The BSIMBULK model is not available in Ngspice by default. However, an experimental Verilog-A model that was adjusted for compilation with ADMS is available. Hence, this enables a fair comparison between ADMS and OpenVAF in the same simulator.

Benchmark Setup: Simulation of MOSFET output characteristics with very fine bias steps.

Benchmark results (in seconds, less is better):

• Ngspice (OpenVAF): 2.08s
• Ngspice (ADMS): 3.38s

Benchmark Setup: Simulation of MOSFET transient characteristics with very fine fixed time steps.

Benchmark results (in seconds, less is better):

• Ngspice (OpenVAF): 9.47s
• Ngspice (ADMS): 13.70s

=> OpenVAF based simulations are between 40% and 100% faster than ADMS based simulations in Ngspice

PSP 103.8 Inverter

This benchmark demonstrates a use-case that is close to a real-world use case. Note that the performance difference here is smaller in relative terms because more time is spent on other simulator tasks such as matrix factorization.

Benchmark: Transient simulation of the inverter from the examples section using a very fine bias grid.

Benchmark results (in seconds, less is better):

• Ngspice (OpenVAF): 20.01s
• Ngspice (ADMS): 25.07s

=> OpenVAF provides a 20% speedup compared to ADMS in a realistic transient simulation of a simple circuit

ISCAS Benchmark Circuit with PSP 103.8

Benchmark: Transient simulation of the ISCAS benchmark circuit from the examples' section using a very fine bias grid. Note that Ngspice has been built with openmp for this example to enable parallelization.

Benchmark results (in seconds, less is better):

• Ngspice (OpenVAF): 20min
• Ngspice (ADMS): 25min

=> OpenVAF has a 20% speedup compared to ADMS in massively parallel transient simulation